On Saturday 10 August 2002 11:59, you wrote:
> On Sat, 10 Aug 2002, Jon Masters wrote:
> > Let's be clear, Intel is shit. Certain other CPUs provide different
> > sets of global registers for each trap level and fast context switching,
> > which effectively does away with a lot of debate - has anyone tried and
> > compared such polling drivers on a SPARC based system?
>
> s/SPARC/UltraSPARC/. More specifically V9 for real pedants (hello Paul).
From what I read of SPARC idea, it didn't really work out in practice, as
compiler writers couldn't keep track of the register windows.
Perhaps it'd work well in assembler, and there's enough to avoid problems
overwriting previous windows interrupting interrupts etc.
Anyway the ring buffer explanation, is best bit, the driver is only in poll
mode, whilst there is data to process, if there's none left in ring buffer it
goes back to interrupts. Whilst there is, then you don't need interrupts to
know there's something to do, do you?
I'm not sure how the PCI DMA updates the ring buffer, so that the tasklet
cannot access it simultaneously, though I guess some protocol is used similar
to spin locks in SMP.
Rob
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